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Evaluation Kit for 4LS

General description

4LS Evaluation Kit enables an easy setup and evaluation of the 4LS line scan family, namely the 4LS15K, 4LS10K and 4LS5K variants. The system’s FPGA provides the control signals to the sensor, defining the state machine timings. The user can choose one sensor clock out of two possibilities: 60 MHz (for 12-bit mode) and 80 MHz (for 8-bit mode). The FPGA acquires the RAW data synchronously via LVDS data stream and send to the host over USB3 protocol. Also over USB3, the user can configure the line rate and exposure time, as well as access to all sensor registers, performing write and read operations over SPI interface. Using the 4LS Viewer software, the user can evaluate the sensor’s features as well as data capture and analysis.

Technical documents

Type Description Language
User Guide 4LS Evaluation Kit English

Other information

Type Description Language
Image 4LS EVK Perspective View1
Image 4LS EVK Perspective View2
Image 4LS EVK Perspective View3
Image 4LS EVK Perspective View4
Image 4LS EVK Perspective View5
Image 4LS EVK Side View1
Image 4LS EVK Side View2
Image 4LS EVK Side View3
Image 4LS EVK Side View4
Image 4LS EVK Top View

Resources

Type Description Language
Evaluation Software 4LS_EvalSW_Viewer_pWin_v5-7-2-10.exe 4LS Evaluation Kit enables an easy setup and evaluation of the 4LS line scan family, namely the 4LS15K, 4LS10K and 4LS5K variants. EN
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