AS5850B Digital X-ray Flat Panel Readout IC
256-channel high-speed, low-noise charge-to-digital converter
特徴
- Line times down to 20 µs, or 15 µs in ADC low-OSR mode
- Binning mode (half the number of effective channels) for faster readout speed down to 10 µs
- Selectable parameters: input charge range, holes or electrons polarity, detector timing, low-pass filter time constant and line time
- Up to three different internal charge pump cycles for offset adjusting, signal emulation and switch charge injection compensation
- Four power modes in addition to sleep and full power-down modes
- Correlated Double Sampling for offset subtraction with programmable time constant
利点
- Flexible programming options to optimize for application needs
- Suitable to a wide range of detector sizes, supporting line capacitances up to 200 pF
- Best-in-class figure of merit for noise, power consumption and speed
- High-speed for dynamic applications
- Ultra-low power for portable applications
- Low-noise for great image quality
- Accurate temperature feedback
- Chip-on-flex packaging suitable to ACF bonding on the detector side and to a low-cost standard connector on the PCB side
製品パラメーター
| Applications | Medical Imaging, Digital Radiography |
|---|---|
| Primary Function | Charge-to-digital Converter |
| Channels | 256 (240) |
| Resolution [bit] | 16 |
| Input Related Noise | 500 electrons |
| Min. Power Consumption [mW per Channel] | 1.1 - 3.1 |
| Min. Integration Time / Line Time [µs] | 15 |
| Package | Chip-on-Flex (ACF bonding + standard connector) |
概要
The AS5850B is a 16-bit, 256-channel low-noise charge-to-digital converter designed for use in digital X-ray systems. The high degree of programmability enables system performance optimization in a wide range of applications. The combination of fast speed, low noise and low power consumption maximizes the image quality and minimizes patient dose, exposure whilst improving the time to market.
Each channel front-end consists of a charge sensitive amplifier (CSA) and a correlated double sampler (CDS), that removes offset and flicker noise from the signal, which is then converted to digital. A fast and reliable LVDS interface transmits the output digital data off-chip. Built-in diagnostic functionalities enable to locate the source of errors in the signal chain from the detector to the data acquisition system. Voltage references and a temperature sensor are included on the chip. An SPI interface allows easy programming of the device parameters.
Four different power modes allow the user to minimize the current consumption for the chosen speed. Line times of 20, 28.5, 40 and 80 μs require as little as 3.1, 2.6, 1.6 and 1.1 mW per channel respectively. A special ADC operation mode is also available, that decreases the minimum line time to 15 μs without increasing the power consumption. Additionally, it is possible to add together the charges in pairs of adjacent channels; with this binning, the fastest achievable line time is 10 μs.
本製品は以下の用途に適しています。
- Static and dynamic digital X-rays
- Digital radiography
- Mammography
- Fluoroscopy
- Interventional X-ray imaging
- Industrial Non-Destructive Testing (NDT)
ツール
| タイトル | カテゴリー | 見出し | 購入 |
|---|---|---|---|
| AS585x Eval Kit | Application Board | Evaluation Kit for AS585x |
技術資料
| タイプ | 品目 | 言語 | ||
|---|---|---|---|---|
| Special Datasheet | AS585xB Short Datasheet | English |
環境関連文書
| タイプ | 品目 | 言語 | ||
|---|---|---|---|---|
| RoHS Certificate | AS585xB RoHS Certificate | English |
関連のボード
Evaluation Kit for AS585x
AS585x Eval Kit
The AS585x Evaluation Kit is a stand-alone system, supporting all devices of the AS585x family. It allows the complete device configuration, the measurement of all the relevant parameters (like noise and input linearity) and the connection to an X-ray photodetector panel.
Two different AS585x samples are included in the Evaluation Kit in order to perform the complete evaluation:
1. AS585x Chip-on-Board (COB) sample: The AS585x die is directly bonded to the AS585x sample board, which is equipped with the signal generator circuitry. Such circuitry allows the generation of the input signals that emulate the photodetector as in the real application.
2. AS585x Chip-on-Flex (COF) sample: The default package type of the AS585x, where the die is bonded on a flex substrate. Such package allows the direct connection to an X-ray photodetector panel.
関連製品
AS5851B Digital X-ray Flat Panel Readout IC
AS5851B
The AS5851B is a 16-bit, 256-channel low-noise charge-to-digital converter designed for use in digital X-ray systems. The high degree of programmability enables system performance optimization in a wide range of applications. The combination of fast speed, low noise and low power consumption maximizes the image quality and minimizes patient dose, exposure whilst improving the time to market.
Each channel front-end consists of a charge sensitive amplifier (CSA) and a correlated double sampler (CDS), that removes offset and flicker noise from the signal, which is then converted to digital. A fast and reliable LVDS interface transmits the output digital data off-chip. Built-in diagnostic functionalities enable to locate the source of errors in the signal chain from the detector to the data acquisition system. Voltage references and a temperature sensor are included on the chip. An SPI interface allows easy programming of the device parameters.
Two different power modes allow the user to minimize the current consumption for the chosen speed. Line times of 40 and 80 μs require as little as 1.6 and 1.1 mW per channel respectively. Additionally, it is possible to add together the charges in pairs of adjacent channels; with this binning, the fastest achievable line time is 20 μs.
AS5852B Digital X-ray Flat Panel Readout IC
AS5852B
The AS5852B is a 16-bit, 256-channel low-noise charge-to-digital converter designed for use in digital X-ray systems. The high degree of programmability enables system performance optimization in a wide range of applications. The combination of fast speed, low noise and low power consumption maximizes the image quality and minimizes patient dose, exposure whilst improving the time to market.
Each channel front-end consists of a charge sensitive amplifier (CSA) and a correlated double sampler (CDS), that removes offset and flicker noise from the signal, which is then converted to digital. A fast and reliable LVDS interface transmits the output digital data off-chip. Built-in diagnostic functionalities enable to locate the source of errors in the signal chain from the detector to the data acquisition system. Voltage references and a temperature sensor are included on the chip. An SPI interface allows easy programming of the device parameters.
A line time of 80 μs requires as little as 1.1 mW per channel. Additionally, it is possible to add together the charges in pairs of adjacent channels; with this binning, the fastest achievable line time is 40 μs.