Senior Staff Engineer, Digital RTL2GDS Enablement
Research & Development
- Regular Fulltime
- Connect global RTL2GDS design and verification engineering, R&D and outsourcing partners
- Set up design reviews, defining/tracking /working to ensure schedule and best practices adherence
- Participate to testbenches/testcase definition to verify PDKs, define methodologies and improve implementation flow
- Be ready to actively participate in specific tasks of ongoing projects if required.
- 10+ years experience in Digital IC Design ASIC implementation, with proficiency in digital backend design with 40nm and below technologies.
- Deep knowledge of RTL2GDS flow: digital design constraining, synthesis, scan insertion, Floorplanning, Place and Route, EMIR analysis, UPF/CPF, Timing/Power Analysis
- Knowledge of Cadence tools (Genus, Innovus, LEC, Conformal, Voltus) and DFT (Compression, LBIST, ATPG, Pattern generation) are strong plus
- Excellent presentation skills. Initiative, enthusiasm