Job no.

006735

Position Type

Research & Development

Working time

• Regular Fulltime

Place of employment

Valencia

What we offer:

Your tasks and responsibilities

• Ensure Allegro PCB Design according to specifications and Design rules
• Take responsibility for project effort estimations and project reviews related to PCB layout design
• Work with multi-functional team to understand system requirements and physical design limitations
• Drive co-optimization of physical design on Multi Layer Board (MLP), System in Package (SiP), package and silicon
• Provide implementation guidelines and feedback to silicon, package and system design groups
• Perform feasibility study, design verification and sign off
• Resolve PCB design issues with fabrication and manufacturing vendors

Your education and experiences

• Strong experience in Cadence Allegro or SIP for physical design
• Experience in the physical design of multi-layer (MLBs) or system in package (SIP)
• Experience in schematic capture and system integration
• Technical degree or equivalent is necessary
• Strong physical understanding of power and signal integrity fundamentals
• Experience in the physical design of Power Delivery Networks (PDNs) and high-speed signals at PCB level
• Familiar with High Density Interconnect (HDI), PCB and Flip-Chip BGA package substrate technologies
• Ability to collaborate and work effectively with cross functional teams
• Excellent organization and planning skills, able to work on parallel tasks
• Base knowledge of Chip Layout or willing to learn Chip Layout
• Familiarity with analog and mixed signal structures
• Soft Skills: excellent communication in English and/or German, problem solving and team player