Principal Engineer, Digital DV

Job no.


Position Type

Research & Development

Working time

  • Regular Fulltime

Place of employment


What we offer:

Your tasks and responsibilities

  • Review, challenge and contribute to digital DV projects
  • Responsible for reviewing, coaching and support of digital DV for key projects
  • Ensure that digital DV is performed in accordance with internal and external engineering standards
  • Contribute to ams best practice in digital DV

Your education and experiences

  • University degree in Electrical Engineering or similar
  • Minimum 15 years professional experience since graduation
  • Direct experience of taking responsibility and reviewing the verification of projects: from planning, through implementation, tracking and status reporting. Thorough understanding of metric driven verification. Thorough knowledge of assertion based formal verification. Experience in providing constructive criticism.
  • Experience in understanding customer requirements, demonstrating the suitability of a verification plan for specification coverage, reachability, tracking and status reporting.
  • Several years of experience in the construction of verification environments using SystemVerilog and much more. Competence in documentation, presentation and explanation of what has been created and in proving its value and suitability. Gifted in explaining the benefits of a pseudo-randomized verification approach and in assessing the suitability of verification coverage. Adept at defining, setting up and using regression environments.

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