Job no.

004730

Position Type

Research & Development

Working time

• Master/Bachelor (student) Thesis

Place of employment

Premstätten

What we offer:

Your tasks and responsibilities

• Master thesis, Low Power Digital Design Flow using IEEE-1801 UPF
• Low power design and verification are increasingly necessary in today's IC design. The IEEE 1801 standard, Unified Power Format (UPF), is an industry wide power format specification to enable low power design and verification from RTL through physical design implementation. This master thesis will evaluate UPF-based low power design, verification, and implementation based on 40nm CMOS technology using EDA (Electronic Design Automation) tools available at ams AG.
• Evaluate Digital Design Tools and acquire skills in UPF Methodology. Review 40nm CMOS technology for power optimization capabilities. Combine these disciplines to a low power design flow.

Your education and experiences

• Completed Bachelor studies in Information and Computer Engineering or similar
• Basic experience in Verilog HDL and EDA tools (simulation, synthesis, PnR) is an advantage

Collective salary and wage agreement

The type of contract for a master thesis is a “Freier Dienstnehmer” / “freelance employment” for a duration of 6 months. During this time frame you will receive a monthly payment of EUR 1.000, - gross. Additional there is the possibility to receive a performance bonus of EUR 3.000, - gross for the successful completion of the Master Thesis.